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Expert ASIC/FPGA Verification Engineer

Company: Boeing
Location: Garden Grove
Posted on: February 7, 2020

Job Description:

At Boeing, we are all innovators on a mission to connect, protect, explore and inspire. From the sea bed to outer space, you'll learn and grow, contributing to work that shapes the world. Find your future with us. Position Overview:Boeing Defense Space & Security seeks Expert Digital ASIC/FPGA Verification Engineer to support the Satellite Capabilities organization and multiple satellite product lines based in El Segundo, CA.Position Responsibilities:

  • Leads verification teams. Reports status to management.
  • Utilizing high-level architectural documentation along with algorithm descriptions, develops models in SystemVerilog to verify ASIC/FPGA design implementation and develop and run scripts and Makefiles.
  • Maintains detailed requirements and specifications for ASICs and FPGAs.
  • Develops and maintains code and integrates software components (such as UVCs) into a UVM verification testbench.
  • Creates and develops said UVM testbench.
  • Evaluates and integrates third-party verification IP (VIP).
  • Develops verification plans, test procedures, and simulation environments and testbenches, executing the test procedures and documenting results to ensure product backlog items are complete and system requirements are met.
  • Establishes verification metrics.
  • Conducts various methods of testing and analysis to verify design.
  • Provides basic engineering support throughout the lifecycle of the product.
  • Conducts trade studies and literature research to support future product designs.
  • Stays current on new technologies and best practices.
  • Works independentlyThis position offers relocation based on candidate eligibility. Basic relocation is available for internal candidates.Basic Qualifications (Required Skills/Experience): -
    • This position must meet Export Control compliance requirements, therefore a "US Person" as defined by 22 C.F.R. - 120.15 is required. "US Person" includes US Citizen, lawful permanent resident, refugee, or asylee.
    • Bachelor, Master or Doctorate of Science degree from an accredited course of study, in engineering, computer science, mathematics, physics or chemistry.
    • 9 or more years' experience using object oriented programming (OOP), e.g. Java, Python, Ruby, C++, Objective-C, Visual Basic .NET, Smalltalk, Curl, Delphi, Eiffel, or SystemVerilog with OOP constructs.
    • Work experience using Linux or Unix terminal commands.
    • Work experience using scripting languages: Make, Perl, Python, shell scripts, etc.Preferred Qualifications (Desired Skills/Experience):
      • 9 -or more years of experience in digital ASIC/FPGA verification/simulation.
      • 12 or more years of experience with Object Oriented Programming (OOP) and Universal Verification Methodology (UVM): creating UVM drivers, monitors, predictors, and scoreboards.
      • Work experience using SystemVerilog and SystemVerilog Assertions (SVA).
      • Experience designing testbenches specifically optimized for hardware emulators (to accelerate simulations).
      • Experience developing, designing, and conducting research that results in new product offerings or business opportunities.
      • Experience representing the Company in industry research and development activities.
      • Experience leading technical aspect of proposal preparation.
      • Experience leading review of test/simulation results and analysis to ensure compliance of the design to the requirements specification.
      • Experience developing functional coverage models and closing code coverage.
      • Experience working in an Agile/iterative development and design process.
      • Work experience creating self-checking simulation testbenches from scratch.
      • Work experience creating reusable testbench components.
      • Work experience writing test/simulation plans, simulation procedures, and results reports.
      • Experience leading teams of engineers, reporting status to program management.
      • Experience creating and improving department process guidelines and procedures (e.g. engineering standards, checklists, process flows, etc.).
      • Experience evaluating and recommending technology that is new to the organization.
      • Experience working other engineering teams (e.g. hardware test/STE engineers, board designers, system engineers, requirement engineers, reliability engineers, microprocessor/software engineers), to ensure the ASIC/FPGA functions safely and reliably, to guide the verification of the ASIC/FPGA.
      • Experience identifying, tracking, and providing status of technical performance metrics to measure progress and ensure compliance with requirements.
      • Bachelor's degree and 25 or more years' experience in digital ASIC/FPGA design and verification, Master's degree with 23 or more years' experience in digital design/verification, or PhD degree with 19 years of experience in digital design/verification.
      • Experience using Revision Control Systems: Subversion (SVN), CVS, Git.
      • Work experience with HDL design, coding, and debug. -
      • Experience mentoring junior engineers, (e.g. teaching UVM and other verification concepts).Typical Education / ExperienceDegree and typical experience in engineering classification: Bachelor's and 20 or more years' experience, Master's with 18 or more years' experience or PhD with 15 or more years' experience. Bachelor, Master or Doctorate of Science degree from an accredited course of study, in engineering, computer science, mathematics, physics or chemistry. ABET is the preferred, although not required, accreditation standard.Boeing is a Drug Free Workplace where post offer applicants and employees are subject to testing for marijuana, cocaine, opioids, amphetamines, PCP, and alcohol when criteria is met as outlined in our policies. -

Keywords: Boeing, Garden Grove , Expert ASIC/FPGA Verification Engineer, Engineering , Garden Grove, California

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